IP Cores Ready for AS5643 Generation 2!

Synthesizable IP cores for 1394 and AS5643
PHY, LLLC, PHY & LLC for multiple FPGA families

IEEE-1394 and AS5643 IP Solutions
FireCore, FireLink and FireGate

Sparked by a need

DapTechnology's IP solutions are based on the need for a reliable data capture, verification and analysis engine developed for the FireSpy® product line. This solution has been shipped on all of DapTechnology's analyzers, has been tested over and over again. It has been a great starting point for FireLink®.

FireGate was developed because of the need for faster bus speeds. Off-the-shelf silicon has maxed out at S800, yet the imaging industry required speeds of S1600 and S3200. For many years DapTechnology has been the only vendor of such high speeds.

In recent years the Aerospace industry challenged the IEEE-1394 technology with some unique requirements which can be addressed with IP approaches.

Power in your hand

Competitive I/O device functionality and its time-to-market is critical in today's fast paced world and avionics is not stranger to this. Our FPGAs focus on this overall paradigm and we architecture as well as position our solutions accordingly. Give our customers the maximum power, flexibility as well as best performance-to-cost ratio.

We strongly believe that our IP cores are state-of-the-art and we are constantly pushing the envelope regarding functionality. DapTechnology's IP development is organically funded and we do not rely on government funded programs/projects.

Arguments for IP solutions

What are the key technical arguments in favor of IP for an AS5643 implementation?

Many advantages are obvious: Apart from having achieved new milestones for S1600 and S3200 transmission speeds, IP solutions offer a very customizable solution for both the Link as well as the PHY layer. Key elements include:

  • Configurable number of PHY ports,
  • Receive and Transmit Status monitors,
  • Bit Error Injection and Bit Error Rate Testing,
  • Offloading of packet encapsulation tasks from Host CPU,
  • Precise STOF offset timing,
  • Configurable host interfaces with or without DMA capability,
  • Features like Bus, Resource and Cycle Master capabilities,
  • Expanded HW Filtering and isochronous data streaming ports.


The technical benefits are by no means limited to the above list and they only represent a portion of all available possibilities. Please speak to DapTechnology about your specific challenges and requirements. We are here to listen, advise and help with building a powerful solution.

Can IP pave the way for a 2nd generation of AS5643?

FPGAs are becoming widely accepted in avionics applications due to their significant advantages for introducing technological innovation. Furthermore, the need for customized solutions, critical bug fixes together with specific enhancements for the IEEE-1394 and AS5643 interface is gaining in importance in order to provide more reliable, stable and mature avionic systems. Looking at it in the big picture, IP-based AS5643 interface solutions can be the trigger for a new generation of AS5643 functionality, interface definition and system performance. At a minimum IP solutions can be a development bread-boarding and testing platform for a later integration of silicon or ASICs. However, with modern FPGAs becoming more powerful together with affordable pricing, the costs for such silicon development, testing and verification likely will become prohibitive.