DapTechnology:Extended - Specification

FireLink® Extended Version - Specification


LUTs:	2200 - 3000	(depends on FPGA type)
FFs:	1500 - 1900	(depends on FPGA type)
Block RAMs:	1 – 128	(depends on FPGA type and needed FIFO size)
Host Bandwidth (peak):	400 MByte/s	(depends on host bus interface)
FIFO size:	1K – 64K	(depends on FPGA type)
# of DMA channels:	4 - 68
Supported FPGA platforms:	Xilinx families:	Spartan2, Spartan3, Spartan6, Virtex-E, Virtex-2, Virtex-4, Virtex-5	, Virtex-64
	Altera familis:	Cyclone, CycloneII/III, Stratix, StratixII
Code Basis:	VHDL
License Types:	Netlist
	Source Code

Specification details to change as product evolves.