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FireCore - IEEE-1394-2008 Beta Integrated PHY/Link IP Core

FireCore™ is a synthesizable IEEE-1394-2008 Beta PHY and Link Layer Controller (LLC) Core integrated into a single IP product. FireCore™ combines the PHY and Link Layer requirements of a typical 1394 device in one IP Core. Based on FireGate PHY IP core and FireLink® LLC IP core, FireCore™ is architected to support data rates of S100 through S3200 and various host interfaces including general purpose, OHCI and OHCI with AS5643 options. System designs can now entirely isolate the typical issues associated with off-the-shelf silicon (availability, roadmap, revisions) and have full control via in-field upgrades and optimization.

The advantages are obvious: Apart from having achieved new milestones for S1600 and S3200 transmission speeds, FireCore™ offers a very customizable solution for both the Link as well as the PHY layer. Key elements include a configurable number of PHY ports, Bit Error Injection and Bit Error Rate Testing, a configurable host interface with DMA capability, optional features like Bus, Resource and Cycle Master capabilities, expanded HW Filtering and isochronous data streaming ports.

With FireCore™ DapTechnology targets two main market segments, i.e. high bandwidth and AS5643 applications, the latter is predominant in aerospace and defense systems.

Faster speeds (beyond 800 Mb/s) for FireWire have become a real need. The requirement predominantly originates from bandwidth rich applications in the video and audio arena. Even with the current industry standard of 800 Mb/s there are restrictions in the amount of video data that can be transmitted, especially when dealing with high-resolution, uncompressed video streams. While quite common and generally accepted in the consumer video arena (MPEG or DV video compression) in virtually all industrial, medical, scientific and avionics applications, lossy compression (e.g. JPEG) algorithms are not usable. Higher and higher video resolution demands more and more bandwidth when for video streams. Likewise, the number of simultaneously transmitted streams is rising for typical applications. DapTechnology is firmly convinced that FireCore™ is the only viable solution that offers a technological and economical roadmap for products in this domain and therefore presents a bright future for next generation vision-based products.

The other key area for value added deployment of FireCore™ is the field of highly targeted applications. Usage of FireWire in the aerospace market is a prime example. DapTechnology’s new FireCore™ package offers unprecedented technical features and functions, added flexibility, options for customization and future expansion. The product not only addresses the earlier mentioned silicon availability and roadmap issues but furthermore, it offers a roadmap for AS5643 HW level support. Together with FireStack™ (DapTechnology’s 1394 software stack), FireCore™ is designed to take complete advantage of AS5643 extensions. It is the clear objective to fully abstract the 1394 protocol layer and largely the AS5643 protocol layer so the implementers can focus entirely on system level functions like fault tolerance, fault isolation and redundancy. For both FW components – FireLink™ and FireGate™ - DapTechnology has a very clear strategic vision as to how the company directly supports distinct features and functions for AS5643 (Mil1394). Both can be implemented as standalone solutions with remarkable advantages. In combination the two offer the possibility to architect a system with measurable benefits.


S400 Status: active
Partnumber: FC400-RPL-[Extended / GPLink]
S800-S1600 Status: active
Partnumber: FC1600-RPL-[Extended / GPLink]
S800-S3200 Status: active
Partnumber: FC3200-RPL-[Extended / GPLink]
S100-S3200 Status: under development
Partnumber: FC100-3200-RPL-[Extended / GPLink]

Design features and benefits

There are several advantages when using FPGAs to implement a complete 1394 I/O interface. Some of these are:


Single-chip solution: Combination of PHY and Link Layer IPs thus creating smaller solutions. Additional components (CPUs, encoders, etc) can be added to create a System On Chip (SOC) solution.

Flexible number of ports: Commercially available PHY chips have a fixed number of ports which for small peripherals is often overkill. On the other hand, host adapter would likely benefit from 3 or more ports and a hub could even have more than that. For a PHY based on FPGA technology, the user can customize the number of ports as required.

Optional debug and test features: Optionally the user can include debug and test features like BERT (Bit Error Rate Test) Low level data monitoring and recording

Field-upgradable: The used FPGAs are field upgradable thus allowing the addition new features or bug fixes, even if the device is already in the field.

Cost effective ASICS: Once a design is finalized an IP solution offers a very cost effective path to spinning a custom ASIC. 

Reference system

Dap has developed a complete S3200 system, including a 4-lane PCI-express host adapter, a S3200 FireWire analyzer and a peripherals development board which can be used by customers to develop their own products.

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